Tutorial: Hello LED (FPGAedu Board v1)

Your first FPGA "Hello world": blink an on-board LED with Verilog.

Goal

Learn the full open-source synthesis & flashing flow on the FPGAedu Board v1 (Lattice iCE40).

Requirements

FPGAedu Board v1 connected over USB
Yosys + nextpnr-ice40 + IceStorm toolchain
A text editor

Verilog code

// hello_led.v
module hello_led (
    input  wire clk,    // 12 MHz on-board clock
    output wire led
);
    reg [23:0] cnt = 0;
    always @(posedge clk) cnt <= cnt + 1;
    assign led = cnt[23];   // ~0.7 Hz, visible blink
endmodule

Constraints file (PCF)

set_io clk  35
set_io led  39

Build and flash

yosys     -p "synth_ice40 -top hello_led -json hello_led.json" hello_led.v
nextpnr-ice40 --hx1k --package tq144 --pcf hello_led.pcf \
              --json hello_led.json --asc hello_led.asc
icepack   hello_led.asc hello_led.bin
iceprog   hello_led.bin

Verification

LED0 should blink roughly every 1.5 seconds.

Next step

Continue with Tutorial: Hello UART to send your first message from the FPGA to your PC.

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